1. Field of the Invention
The present invention generally relates to the field of data switching. In particular, the present invention relates to implementing switch stacking capability for a switch device, and methods for stacking said switch device with one or more other switch devices.
2. Background Art
Currently there exists various switch devices (including certain Ethernet switches) which can interconnect the full input/ouput (I/O) bandwidth of a plurality of front panel ports simultaneously. More particularly, a set of ports of such a switching device can be switchably interconnected such that any data traffic (e.g. data packets) received in one port in the set of ports can be switched to any other port in the set of ports as long as the input bandwidth of the set of ports is not exceeded—i.e. without blocking the switching of any incoming data traffic of the set of ports. This behavior is termed non-blocking switching.
Stacking switches to create a larger aggregate non-blocking switch is currently achieved, for example, by connecting switches with Ethernet cables and dedicating some of the front panel ports solely for the purpose of switch stacking. For example, FIG. 1 illustrates a switch system 100 including a standalone switch device 110 stacked with a standalone switch device 115. Switch device 110 includes a plurality of ports 120a-120h to exchange switched data. Similarly, switch device 115 includes a plurality of ports 125a-125h to exchange switched data. On their own, each of switch devices 110, 115 may support internal non-blocking switching among at least some of their respective sets of ports, e.g. among ports 120a-120h and/or among ports 125a-125h. For example, the respective data switching within switch devices 110, 115 may be via switch chips 130, 135.
According to current practice, standalone switch devices 110, 115 may be stacked, for example, by connecting stacking ports 150a, 150b of switch device 110, respectively, to stacking ports 155a, 155b of switch device 115. Configurable switch components such as switch chips 130, 135 may then be configured—e.g. by switch controllers 140, 145, respectively—to interconnect at least some ports from each of switch devices 110, 115. However, configuration in order to stack switch devices 110, 115 merely redirects switching bandwidth of switch chips 130, 135 from supporting respective front panel ports (e.g. ports 120g, 120h and ports 125g, 125h) to supporting respective stacking ports (e.g. stacking ports 150a, 150b and stacking ports 155a, 155b). The total I/O bandwidth to be directed away from the front ports of stacked switch devices 110, 115 grows with the total number of aggregated ports in stacked switches 110, 115 for which non-blocking switching is to be implemented. This type of stacking is inefficient in that it “burns up” front panel ports in order to support non-blocking switching for fewer remaining front panel ports. This type of stacking both consumes front panel port capacity and uses an excessive number of stacking cables as more stacking connections need to be established to support non-blocking switching for larger aggregations of switch devices at increasingly high bandwidth. The performance and resource costs associated with this type of switch stacking limits the ability to implement non-blocking switching for stacked switches using switches such as switch devices 110, 115.